A typical bipolar, CMOS or BiCMOS output buffer has an uncontrolled edge rate (the rate at which the output transitions from a first voltage to a second) that depends primarily on the size of the output driving device and the load being driven. Propagation delays (the time delay between the input of a signal at the input port and the corresponding output at the output port) through on output buffer can vary 4-5 times due to the variations in supply voltage (V.sub.CC), temperature, process and load. The result is that edge rates are very fast at light loads, strong process, high supply voltage (V.sub.CC) and low temperature. Conversely, edge rates are slow and propagation delays are extremely long at heavy loads, weak process, low supply voltage (V.sub.CC) and low temperature. In addition to undesirable variations in propagation delay and edge rates, currently available output buffers may induce noise onto the system ground and voltage supply lines. The fast edge rates cause large voltage spikes on the ground and supply voltage leads because of the high transient current (di/dt) they generate. Consequently, cross-coupling between pins and subsequent logic errors can result especially when large packages are used.
Currently available output buffers control edge rates and transient noise by adding impedance in series with the output devices or turning on the output devices in stages to limit the peak currents. Both of these methods have serious disadvantages in that the output propagation delay is even more sensitive to variations in supply voltage, process temperature and load.
Thus, a need has arisen for an output buffer in which transient noise and edge rates can be controlled. At the same time, the output buffer should compensate for variations in supply voltage process temperature and load.